The present invention relates to semiconductor structures for visual displays. More particularly, the present invention relates to a field emission device. In particular, the present invention relates to fabrication of a field emitter tip.
Integrated circuits are currently manufactured by methods in which semiconductive structures, insulating structures, and electrically conductive structures are sequentially constructed in a predetermined arrangement on a semiconductor substrate. In the context of this document, the term xe2x80x9csemiconductor substratexe2x80x9d is defined to mean any construction comprising semiconductive material, including but not limited to bulk semiconductive material such as a semiconductive wafer, either alone or in assemblies comprising other materials thereon, and semiconductive material layers, either alone or in assemblies comprising other materials. The term semiconductor substrate is contemplated to include such structures as silicon-on-insulator and silicon-on-sapphire. The term xe2x80x9csubstratexe2x80x9d refers to any supporting structure. As used herein, xe2x80x9cfield emission devicexe2x80x9d is defined to mean any construction for emitting electrons in the presence of an electrical field, including but not limited to an electron emission structure or tip either alone or in assemblies comprising other materials or structures.
Miniaturization of structures within integrated circuits focuses attention and effort to incorporating field emission devices within semiconductor substrates. A field emission device typically includes an electron emission structure, or tip, configured for emitting a flux of electrons upon application of an electric field to the field emission device. An array of miniaturized field emission devices can be arranged on a plate and used for forming a visual display on a display panel. For example, field emission devices may be used in making flat panel displays for providing visual display for computers, telecommunication, and other graphics applications. Flat panel displays typically have a greatly reduced thickness compared to cathode ray tubes.
U.S. Pat. No. 5,635,619 issued to Cloud et al. and U.S. Pat. No. 5,229,331 issued to Doan et al. disclose field emission devices. The foregoing patents are hereby incorporated by reference for purposes of disclosure. A general view of a field emission device (FED) much like those that are disclosed in the foregoing patents to Cloud et al. and Doan et al. particularly as geometries become relatively small, is seen in FIG. 1. The FED employs a cold cathode and includes a substrate 28, which can be composed of glass, for example, or any of a variety of other suitable materials. A cathode conductive layer 30, such as doped polycrystalline silicon, is deposited onto substrate 28.
At a field emission site location, an emitter tip 14, which is a micro-cathode, is constructed over substrate 28. A variety of shapes have been used for emitter tip 14, so long as the emitter tip 14 tapers to a relatively fine point. Surrounding emitter tip 14 is a low potential anode gate structure 38, which is separated from cathode conductive layer 30 by means of a dielectric layer 34.
When a voltage differential is applied between emitter tip 14 and anode gate structure 38 using, for example, voltage source 32, an electron flux 24 is emitted and accelerates toward an anode panel 26. The anode panel 26 includes a transparent panel 44, such as glass; a phospholuminescent panel 48; and an anode conductive layer 46, which is electrically connected to source 32. The electron flux 24 strikes and excites the phospholuminescent panel 48, thereby causing light 36 to be emitted and to pass through transparent panel 44.
The coordinated activity of a plurality of emitter tips 14 arrayed over a flat panel display provides a visual display that may be viewed by a user. Each individual or cluster of emitter tips 14 that is provided on a flat panel display may be assigned a unique matrix address. When such a flat panel display is used, the emitter tips 14 are systematically activated by means of their matrix addresses in order to provide the desired visual display.
Significant problems with emitter tip 14 in the above described device are evident in the prior art due to shrinking geometries. As seen in FIG. 1, manufacturing processes that are commonly used in the prior art typically form an emitter tip 14 that has a curvilinear vertical profile. FIG. 2 illustrates an intermediate stage in the formation of emitter tip and further depicts the curvilinear vertical profile thereof In FIG. 2, the intermediate semiconductor structure 10 comprises cathode conductive layer 30, emitter tip 14, and a hard mask 16 that covers emitter tip 14 prior to its removal. It can be seen that emitter tip 14 includes wings 18 that cause the vertical profile of emitter tip 14 to be curvilinear instead of rectilinear. Wings 18 are unintentional but persistent products of conventional methods of forming emitter tip 14. Emitter tips 14 that have pronounced curvilinear vertical profiles have been found to provide sub-grade performance compared to those that are more nearly rectilinear.
Emitter tip 14 is exposed to the etch gas at large, but it encounters two types of etch gas molecules. A primary collision etch gas molecule 8 (its trajectory illustrated) collides with emitter tip 14 by coming from the etch gas at large. A secondary collision etch gas molecule 12 (its trajectory illustrated) comes from the etch gas at large but it collides with and rebounds from hard mask 16 near the intersection of emitter tip 14 and hard mask 16 just prior to its etch collision with emitter tip 14. Because the etch is selective to hard mask 16, the secondary collision etch gas molecule 12 rebounds from hard mask 16 and, along with primary collision etch gas molecule 8, causes an intensified frequency of collisions into emitter tip 14 in the region of the intersection between hard mask 16 and emitter tip 14. The intensified frequency of collisions into emitter tip 14 by secondary collision etch gas molecule 12 in addition to primary collision etch gas molecule causes increased etching of emitter tip 14 in this region. The increased etching in this region is exacerbated by the increase in surface area that is formed due to both primary- and secondary-collision etch gas molecules. Further, the extinguishment of secondary etch gas molecule 12 causes an etch gas sink which intensifies etching in this region. Hence, wings 18 form because of intensified etching activity in the region of emitter tip 14 near hard mask 16.
As geometries continue to shrink to the point that the mean free path of secondary etch gas molecule 12 is greater than the distance from its collision point on hard mask 16 to emitter tip 14, the problem is only made more pronounced. Additionally, as wings 18 begin to form against hard mask 16, the surface area of emitter tip 14 above wings 18 increases. The increased surface area makes for increased primary and secondary etch gas molecules that collide with emitter tip 14 in this region. This increases etching in this region as compared to the region below wings 18.
In the prior art, hard mask 16 was formed by patterning a photoresist upon an oxide layer, etching to form hard mask 16, and stripping the photoresist. Problems of a curvilinear profile arose in part from etching difficulties as emitter tip geometries continued to shrink. Achieving a substantially rectilinear profile became more elusive as geometries shrank and it became more and more challenging to get an undercutting etch beneath hard mask 16 so as to yield an emitter tip having a rectilinear profile. Because an undercutting etch is a preferred method of achieving emitter tip 14, what is needed in the art is a method of forming a substantially rectilinear profile of an emitter tip as geometries continue to shrink.
The present invention relates to formation of an emitter tip that overcomes the problems in the prior art. A substrate is provided, and a cathode conductive layer is formed thereupon. An emitter layer is formed on the resistive layer. The emitter layer may be any material from which electron emission structures may be formed, especially those materials having a relatively low work function, so that a low applied voltage will induce a relatively high electron flux therefrom. An emitter tip is formed according to the inventive method. In a first procedure, the emitter layer is overlaid with a blanket dielectric which is in turn overlaid by a masking layer and patterned into a masking island according to a size that is dictated by dimensions of the emitter tip to be formed.
In a first etching stage, the masking island is used to etch substantially anisotropically into the oxide to form the oxide island that has substantially the same xe2x80x9cfootprintxe2x80x9d as the masking island.
In a second etching stage, the emitter layer is etched with an etch recipe that is selective to the underlying structure which is positioned beneath the emitter layer. Selectivity of the second etching stage recipe to the masking island is not as great as the selectivity thereof to the oxide island and to the underlying structure. The characteristics of this second etching stage are such that both isotropic and anisotropic qualities are exhibited in the etch recipe. By this combination of qualities, both penetration through the emitter layer and undercutting beneath the oxide island are achieved. In a preferred embodiment, the second etching stage is carried out under etching conditions with the following preferred etching characteristics. Firstly, the directional qualities of the second etching stage etch recipe, as set forth above, include both isotropic and anisotropic characteristics. Secondly, partial mobilization of the masking island creates a skirt region that substantially alters the etch gas that it encounters.
In a third etching stage, selectivity of the etch recipe to the masking island is configured to be lower than in the second etching stage. Additionally, the third etching stage is carried out under conditions that are substantially more anisotropic than in the second etching stage.
An advantage of the inventive method over the prior art is that the masking island does not need to be removed during the inventive etching stages. Additionally according to the present invention, selection of an application-specific chemistry for the masking island prepares the emitter layer for the buffered etching of the second and third etching stages that provide another advantage of a more rectilinear etched profile of the emitter tip.
The present invention has application to a wide variety of field emission devices other than those specifically described herein. In particular, achievement of the emitter tip with a substantially rectilinear profile increases the efficiency of electron emission and therefore lowers the power and increases the ability to achieve higher refresh rates for a video display application.
These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.